This document explains only the device tree data binding. For general
information about PHY subsystem refer to Documentation/phy.txt

PHY device node
===============

Required Properties:
#phy-cells:	Number of cells in a PHY specifier;  The meaning of all those
		cells is defined by the binding for the phy node. The PHY
		provider can use the values in cells to find the appropriate
		PHY.

For example:

phys: phy {
    compatible = "xxx";
    reg = <...>;
    .
    .
    #phy-cells = <1>;
    .
    .
};

That node describes an IP block (PHY provider) that implements 2 different PHYs.
In order to differentiate between these 2 PHYs, an additonal specifier should be
given while trying to get a reference to it.

PHY user node
=============

Required Properties:
phys : the phandle for the PHY device (used by the PHY subsystem)
phy-names : the names of the PHY corresponding to the PHYs present in the
	    *phys* phandle

Example 1:
usb1: usb_otg_ss@xxx {
    compatible = "xxx";
    reg = <xxx>;
    .
    .
    phys = <&usb2_phy>, <&usb3_phy>;
    phy-names = "usb2phy", "usb3phy";
    .
    .
};

This node represents a controller that uses two PHYs, one for usb2 and one for
usb3.

Example 2:
usb2: usb_otg_ss@xxx {
    compatible = "xxx";
    reg = <xxx>;
    .
    .
    phys = <&phys 1>;
    phy-names = "usbphy";
    .
    .
};

This node represents a controller that uses one of the PHYs of the PHY provider
device defined previously. Note that the phy handle has an additional specifier
"1" to differentiate between the two PHYs.

AQ-PHY user node
================

Required Properties:
phy-addr: phy_addr of the phy which will use Aquantia
mdiobus: mdio bus name#number on which the phy is located.

Example:
aq-phy {
	compatible = "qcom,aq-phy";
	qcom,phy-addr = <0x10>;
	mdiobus = <&mdio1>;
};

85XX_MUSIC_SWITCH node
=====================

Required Properties:
sgmii-plus-if-phy-addr: phy addr of the AQ-PHY
chip-id:
	1 -> 8511 chip
	2 -> 8512 chip
	3 -> 8513 chip
	4 -> 8519 chip
qsgmii-cfg-port-mode: GMAC port modes. set 1 for QSGMII
qsgmii-cfg-port-base: 85xx Switch GMAC port ID
qsgmii-cfg-is-speed-forced: GMAC forced speed enable/disable
qsgmii-cfg-forced-speed: GMAC forced speed
qsgmii-cfg-forced-duplex: GMAC mode.
port-26-cfg-port-mode: port 26 is for 8033 phy configuration
port-26-cfg-is-speed-forced: GMAC forced speed
port-27-cfg-port-mode: port 27 is for AQ-PHY configuration
port-27-cfg-is-speed-forced: GMAC forced speed enable/disable
port-27-cfg-forced-speed: GMAC forced speed
port-27-cfg-forced-duplex: GMAC mode.
trunk-cfg-is-trunk-enabled: LAG enable/disable on switch
trunk-cfg-trunk-id: LAG mode
trunk-cfg-trunk-hash-policy: LAG policy
trunk-cfg-trunk-ports-bit-map: LAG bitmap
mdiobus: mdiobus for the 8033 PHY
sgmii-plus-if-phy-mdiobus: mdiobus for AQ-PHY

Example:
qca-85xx-sw {
	compatible = "qcom,qca-85xx-sw";
	qcom,sgmii-plus-if-phy-addr = <0x10>;
	qcom,chip-id = <1>;
	qcom,qsgmii-cfg-port-mode = <1>;
	qcom,qsgmii-cfg-port-base = <1>;
	qcom,qsgmii-cfg-is-speed-forced = <1>;
	qcom,qsgmii-cfg-forced-speed = <1000>;
	qcom,qsgmii-cfg-forced-duplex = <1>;
	qcom,port-26-cfg-port-mode = <2>;
	qcom,port-26-cfg-is-speed-forced = <0>;
	qcom,port-27-cfg-port-mode = <3>;
	qcom,port-27-cfg-is-speed-forced = <1>;
	qcom,port-27-cfg-forced-speed = <2500>;
	qcom,port-27-cfg-forced-duplex = <1>;
	qcom,trunk-cfg-is-trunk-enabled = <1>;
	qcom,trunk-cfg-trunk-id = <0>;
	qcom,trunk-cfg-trunk-hash-policy = <0x6c>;
	qcom,trunk-cfg-trunk-ports-bit-map = <0x1c>;
	mdiobus = <&mdio0>;
	sgmii-plus-if-phy-mdiobus = <&mdio1>;
};
